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    <title>Computer Architecture Podcast</title>
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    <description><![CDATA[<p>A show that brings you closer to the cutting edge in computer architecture and the remarkable people behind it. Hosted by <a href="https://suvinay.github.io/" title="Suvinay Subramanian" target="_blank" rel="noreferrer noopener">Dr. Suvinay Subramanian</a>, who is a computer architect at Google in the Systems Infrastructure group, working on designing Google’s machine learning accelerators (TPU), and Dr. Lisa Hsu who is semi-retired and works part-time in Reality Labs Research at Meta on optics and display technologies for AR.</p>]]></description>
    <pubDate>Mon, 06 Apr 2026 11:06:49 -0700</pubDate>
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    <copyright>Copyright 2020 All rights reserved.</copyright>
    <category>Technology</category>
    <ttl>1440</ttl>
    <itunes:type>episodic</itunes:type>
          <itunes:summary>A show that brings you closer to the cutting edge in computer architecture and the remarkable people behind it.</itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
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    <itunes:owner>
        <itunes:name>comparchpodcast</itunes:name>
                <itunes:email>comparch.podcast@gmail.com</itunes:email>
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        <title>Computer Architecture Podcast</title>
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    <item>
        <title>Ep 23: Cross-stack Design and Tooling for Large-scale Distributed AI Systems with Dr. Tushar Krishna, Georgia Tech</title>
        <itunes:title>Ep 23: Cross-stack Design and Tooling for Large-scale Distributed AI Systems with Dr. Tushar Krishna, Georgia Tech</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-23-cross-stack-design-and-tooling-for-large-scale-distributed-ai-systems-with-dr-tushar-krishna-georgia-tech/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-23-cross-stack-design-and-tooling-for-large-scale-distributed-ai-systems-with-dr-tushar-krishna-georgia-tech/#comments</comments>        <pubDate>Mon, 06 Apr 2026 11:06:49 -0700</pubDate>
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                                    <description><![CDATA[<p>Dr. Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Tech, who holds a Ph.D. from MIT. Tushar’s work shapes how the computing community designs modern large-scale distributed AI systems--spanning specialized accelerators, memory hierarchies, and communication fabrics--and driving design-space exploration with pioneering tools like ASTRA-sim, Chakra, and Garnet. A member of the ISCA, MICRO, and HPCA Halls of Fame, his impactful research has garnered over 21,000 citations and the 2025 DAC "Under 40 Innovators Award." He also actively shapes future AI computing standards as the Co-director of Georgia Tech's CRNCH and co-chair of the MLCommons Chakra Working Group.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Tech, who holds a Ph.D. from MIT. Tushar’s work shapes how the computing community designs modern large-scale distributed AI systems--spanning specialized accelerators, memory hierarchies, and communication fabrics--and driving design-space exploration with pioneering tools like ASTRA-sim, Chakra, and Garnet. A member of the ISCA, MICRO, and HPCA Halls of Fame, his impactful research has garnered over 21,000 citations and the 2025 DAC "Under 40 Innovators Award." He also actively shapes future AI computing standards as the Co-director of Georgia Tech's CRNCH and co-chair of the MLCommons Chakra Working Group.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/ekiiz92y5jwgnh9w/Ep_23_Tushar_Krishna-0019b6et.mp3" length="165475264" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Tech, who holds a Ph.D. from MIT. Tushar’s work shapes how the computing community designs modern large-scale distributed AI systems--spanning specialized accelerators, memory hierarchies, and communication fabrics--and driving design-space exploration with pioneering tools like ASTRA-sim, Chakra, and Garnet. A member of the ISCA, MICRO, and HPCA Halls of Fame, his impactful research has garnered over 21,000 citations and the 2025 DAC "Under 40 Innovators Award." He also actively shapes future AI computing standards as the Co-director of Georgia Tech's CRNCH and co-chair of the MLCommons Chakra Working Group.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>4136</itunes:duration>
                <itunes:episode>23</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
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    <item>
        <title>Ep 22: Measuring Datacenter Efficiency and Visioning the Future of Computer Architecture with Dr. Babak Falsafi, EPFL</title>
        <itunes:title>Ep 22: Measuring Datacenter Efficiency and Visioning the Future of Computer Architecture with Dr. Babak Falsafi, EPFL</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-22-measuring-datacenter-efficiency-and-visioning-the-future-of-computer-architecture-with-dr-babak-falsafi-epfl/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-22-measuring-datacenter-efficiency-and-visioning-the-future-of-computer-architecture-with-dr-babak-falsafi-epfl/#comments</comments>        <pubDate>Wed, 10 Dec 2025 10:40:22 -0800</pubDate>
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                                    <description><![CDATA[<p>Dr. Babak Falsafi is a Professor at EPFL, the founding president of the Swiss Data Center Efficiency Association, and the founder of EcoCloud, an academic consortium focused on sustainable IT. His contributions to computer architecture include the invention of spatial and temporal memory streaming (SMS prefetchers) found in ARM cores and laying the groundwork for fence speculation by defining memory ordering requirements in modern CPUs. He is a key figure in cloud-native server design, with his work forming the foundation for the first-generation Cavium ARM server CPUs. He is a former chair of the SIGARCH Executive Committee, a recipient of the Alfred P. Sloan Research Fellowship and a Fellow of both the ACM and IEEE.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Babak Falsafi is a Professor at EPFL, the founding president of the Swiss Data Center Efficiency Association, and the founder of EcoCloud, an academic consortium focused on sustainable IT. His contributions to computer architecture include the invention of spatial and temporal memory streaming (SMS prefetchers) found in ARM cores and laying the groundwork for fence speculation by defining memory ordering requirements in modern CPUs. He is a key figure in cloud-native server design, with his work forming the foundation for the first-generation Cavium ARM server CPUs. He is a former chair of the SIGARCH Executive Committee, a recipient of the Alfred P. Sloan Research Fellowship and a Fellow of both the ACM and IEEE.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/6tq4wftnr5kvh235/Ep_22_Babak_Falsafi_FINALajbuq.mp3" length="60816403" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Babak Falsafi is a Professor at EPFL, the founding president of the Swiss Data Center Efficiency Association, and the founder of EcoCloud, an academic consortium focused on sustainable IT. His contributions to computer architecture include the invention of spatial and temporal memory streaming (SMS prefetchers) found in ARM cores and laying the groundwork for fence speculation by defining memory ordering requirements in modern CPUs. He is a key figure in cloud-native server design, with his work forming the foundation for the first-generation Cavium ARM server CPUs. He is a former chair of the SIGARCH Executive Committee, a recipient of the Alfred P. Sloan Research Fellowship and a Fellow of both the ACM and IEEE.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3800</itunes:duration>
                <itunes:episode>22</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
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    <item>
        <title>Ep 21: High-assurance Computer Architectures with Dr. Caroline Trippel, Stanford University</title>
        <itunes:title>Ep 21: High-assurance Computer Architectures with Dr. Caroline Trippel, Stanford University</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-21-high-assurance-computer-architectures-with-dr-caroline-trippel-stanford-university/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-21-high-assurance-computer-architectures-with-dr-caroline-trippel-stanford-university/#comments</comments>        <pubDate>Tue, 30 Sep 2025 20:18:57 -0700</pubDate>
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                                    <description><![CDATA[<p>Dr. Caroline Trippel is an Assistant Professor in the Computer Science and Electrical Engineering Departments at Stanford University. Caroline's research operates at the critical intersection of hardware and software, focusing on developing high-assurance computer architectures. Her work tackles the challenge of ensuring that complex hardware designs are correct and secure. She has pioneered automated tools that bridge the gap between a processor's implementation (its RTL) and its formal specification, as well as frameworks and compilers that find and mitigate hardware-related security vulnerabilities in software.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Caroline Trippel is an Assistant Professor in the Computer Science and Electrical Engineering Departments at Stanford University. Caroline's research operates at the critical intersection of hardware and software, focusing on developing high-assurance computer architectures. Her work tackles the challenge of ensuring that complex hardware designs are correct and secure. She has pioneered automated tools that bridge the gap between a processor's implementation (its RTL) and its formal specification, as well as frameworks and compilers that find and mitigate hardware-related security vulnerabilities in software.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/mt437msk9fqqgwi4/Ep_21_Caroline_Trippel_FINALb6pz1.mp3" length="117158973" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Caroline Trippel is an Assistant Professor in the Computer Science and Electrical Engineering Departments at Stanford University. Caroline's research operates at the critical intersection of hardware and software, focusing on developing high-assurance computer architectures. Her work tackles the challenge of ensuring that complex hardware designs are correct and secure. She has pioneered automated tools that bridge the gap between a processor's implementation (its RTL) and its formal specification, as well as frameworks and compilers that find and mitigate hardware-related security vulnerabilities in software.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3661</itunes:duration>
                <itunes:episode>21</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 20: The Tech Transfer Playbook – Bridging Research to Production with Dr. Ricardo Bianchini, Microsoft</title>
        <itunes:title>Ep 20: The Tech Transfer Playbook – Bridging Research to Production with Dr. Ricardo Bianchini, Microsoft</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-20-the-tech-transfer-playbook-bridging-research-to-production-with-dr-ricardo-bianchini-microsoft/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-20-the-tech-transfer-playbook-bridging-research-to-production-with-dr-ricardo-bianchini-microsoft/#comments</comments>        <pubDate>Mon, 16 Jun 2025 23:26:25 -0700</pubDate>
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                                    <description><![CDATA[<p>Dr. Ricardo Bianchini is a Technical Fellow and Corporate Vice President at Microsoft Azure, where he leads the team responsible for managing Azure’s compute workload, server capacity, and datacenter infrastructure with a strong focus on efficiency and sustainability.  Before joining Azure, Ricardo led the Systems Research Group and the Cloud Efficiency team at Microsoft Research (MSR). He created research projects in power efficiency and intelligent resource management that resulted in large-scale production systems across Microsoft. Prior to Microsoft, he was a Professor at Rutgers University, where he conducted research in datacenter power and energy management, cluster-based systems, and other cloud-related topics. Ricardo is a Fellow of both the ACM and IEEE.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Ricardo Bianchini is a Technical Fellow and Corporate Vice President at Microsoft Azure, where he leads the team responsible for managing Azure’s compute workload, server capacity, and datacenter infrastructure with a strong focus on efficiency and sustainability.  Before joining Azure, Ricardo led the Systems Research Group and the Cloud Efficiency team at Microsoft Research (MSR). He created research projects in power efficiency and intelligent resource management that resulted in large-scale production systems across Microsoft. Prior to Microsoft, he was a Professor at Rutgers University, where he conducted research in datacenter power and energy management, cluster-based systems, and other cloud-related topics. Ricardo is a Fellow of both the ACM and IEEE.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/qfzbgfwyaby8evi9/Ep_20_Ricardo_Bianchini_FINAL8svzv.mp3" length="162200554" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Ricardo Bianchini is a Technical Fellow and Corporate Vice President at Microsoft Azure, where he leads the team responsible for managing Azure’s compute workload, server capacity, and datacenter infrastructure with a strong focus on efficiency and sustainability.  Before joining Azure, Ricardo led the Systems Research Group and the Cloud Efficiency team at Microsoft Research (MSR). He created research projects in power efficiency and intelligent resource management that resulted in large-scale production systems across Microsoft. Prior to Microsoft, he was a Professor at Rutgers University, where he conducted research in datacenter power and energy management, cluster-based systems, and other cloud-related topics. Ricardo is a Fellow of both the ACM and IEEE.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>4054</itunes:duration>
                <itunes:episode>20</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 19: Memory Management and Software Reliability with Dr. Arkaprava Basu, Indian Institute of Science</title>
        <itunes:title>Ep 19: Memory Management and Software Reliability with Dr. Arkaprava Basu, Indian Institute of Science</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-19arkaprava-basu-pushing-theboundaries-ofmemory-management-and-softwarereliability-inbothcpusandgpuswithdr-arkaprava-basuindian-institute-ofscience/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-19arkaprava-basu-pushing-theboundaries-ofmemory-management-and-softwarereliability-inbothcpusandgpuswithdr-arkaprava-basuindian-institute-ofscience/#comments</comments>        <pubDate>Mon, 17 Mar 2025 06:24:09 -0700</pubDate>
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                                    <description><![CDATA[<p>Dr. Arkaprava Basu is an Associate Professor at the Indian Institute of Science, where he mentors students in the Computer Systems Lab. Arka's research focuses on pushing the boundaries of memory management and software reliability for both CPUs and GPUs. His work spans diverse areas, from optimizing memory systems for chiplet-based GPUs to developing innovative techniques to eliminate synchronization bottlenecks in GPU programs. He is also a recipient of the Intel Rising Star Faculty Award, ACM India Early Career Award,  and multiple other accolades, recognizing his innovative approaches to enhancing GPU performance, programmability, and reliability.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Arkaprava Basu is an Associate Professor at the Indian Institute of Science, where he mentors students in the Computer Systems Lab. Arka's research focuses on pushing the boundaries of memory management and software reliability for both CPUs and GPUs. His work spans diverse areas, from optimizing memory systems for chiplet-based GPUs to developing innovative techniques to eliminate synchronization bottlenecks in GPU programs. He is also a recipient of the Intel Rising Star Faculty Award, ACM India Early Career Award,  and multiple other accolades, recognizing his innovative approaches to enhancing GPU performance, programmability, and reliability.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/xzgwyhbqmrvner5w/Arka-final_cuta28iw.mp3" length="163362480" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Arkaprava Basu is an Associate Professor at the Indian Institute of Science, where he mentors students in the Computer Systems Lab. Arka's research focuses on pushing the boundaries of memory management and software reliability for both CPUs and GPUs. His work spans diverse areas, from optimizing memory systems for chiplet-based GPUs to developing innovative techniques to eliminate synchronization bottlenecks in GPU programs. He is also a recipient of the Intel Rising Star Faculty Award, ACM India Early Career Award,  and multiple other accolades, recognizing his innovative approaches to enhancing GPU performance, programmability, and reliability.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>4084</itunes:duration>
                <itunes:episode>19</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 18: Codesign for Industrial Robotics and the Startup Pivot with Dr. Dan Sorin, Duke University</title>
        <itunes:title>Ep 18: Codesign for Industrial Robotics and the Startup Pivot with Dr. Dan Sorin, Duke University</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-18-codesign-for-industrial-robotics-and-the-startup-pivot-with-dr-dan-sorin-duke-university/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-18-codesign-for-industrial-robotics-and-the-startup-pivot-with-dr-dan-sorin-duke-university/#comments</comments>        <pubDate>Tue, 17 Dec 2024 08:46:30 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/f7a8bef3-f244-31aa-875f-54894a9d56f4</guid>
                                    <description><![CDATA[<p>Dr. Dan Sorin is a Professor of Electrical and Computer Engineering at Duke University, and a co-founder of Realtime Robotics. Dan is widely known for his pioneering work in memory systems. He has co-authored the seminal Primer on Memory Consistency and Cache Coherence, which has become a foundational resource for students and researchers alike. Dan’s contributions span from developing resilient systems that tolerate hardware faults to innovations in cache coherence protocols, and has been recognized by multiple best paper awards and patents. His work at Realtime Robotics has pushed the boundaries of autonomous motion planning, enabling real-time decision-making in dynamic environments.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Dan Sorin is a Professor of Electrical and Computer Engineering at Duke University, and a co-founder of Realtime Robotics. Dan is widely known for his pioneering work in memory systems. He has co-authored the seminal Primer on Memory Consistency and Cache Coherence, which has become a foundational resource for students and researchers alike. Dan’s contributions span from developing resilient systems that tolerate hardware faults to innovations in cache coherence protocols, and has been recognized by multiple best paper awards and patents. His work at Realtime Robotics has pushed the boundaries of autonomous motion planning, enabling real-time decision-making in dynamic environments.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/xaszmt59pwjpbj4p/CAP_Ep_18_Dan_Sorin6myjo.mp3" length="129802448" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Dan Sorin is a Professor of Electrical and Computer Engineering at Duke University, and a co-founder of Realtime Robotics. Dan is widely known for his pioneering work in memory systems. He has co-authored the seminal Primer on Memory Consistency and Cache Coherence, which has become a foundational resource for students and researchers alike. Dan’s contributions span from developing resilient systems that tolerate hardware faults to innovations in cache coherence protocols, and has been recognized by multiple best paper awards and patents. His work at Realtime Robotics has pushed the boundaries of autonomous motion planning, enabling real-time decision-making in dynamic environments.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3245</itunes:duration>
                <itunes:episode>18</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 17: Architecture 2.0 and AI for Computer Systems Design with Dr. Vijay Janapa Reddi, Harvard University</title>
        <itunes:title>Ep 17: Architecture 2.0 and AI for Computer Systems Design with Dr. Vijay Janapa Reddi, Harvard University</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-17-architecture-20-and-ai-for-computer-systems-design-with-dr-vijay-janapa-reddi/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-17-architecture-20-and-ai-for-computer-systems-design-with-dr-vijay-janapa-reddi/#comments</comments>        <pubDate>Tue, 03 Sep 2024 08:18:58 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/61b802de-b3cb-3ade-aebd-4a19cf31603e</guid>
                                    <description><![CDATA[<p>Dr. Vijay Janapa Reddi is an Associate Professor at Harvard University, and Vice President and Co-founder of MLCommons. He has made substantial contributions to mobile and edge computing systems, and played a key role in developing the MLPerf Benchmarks. Vijay has authored the machine learning systems book <a href='http://mlsysbook.ai'>mlsysbook.ai</a>, as part of his twin passions of education and outreach. He received the IEEE TCCA Young Computer Architect Award in 2016, has been inducted in the MICRO and HPCA Halls of Fame, and is a recipient of multiple best paper awards. </p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Vijay Janapa Reddi is an Associate Professor at Harvard University, and Vice President and Co-founder of MLCommons. He has made substantial contributions to mobile and edge computing systems, and played a key role in developing the MLPerf Benchmarks. Vijay has authored the machine learning systems book <a href='http://mlsysbook.ai'>mlsysbook.ai</a>, as part of his twin passions of education and outreach. He received the IEEE TCCA Young Computer Architect Award in 2016, has been inducted in the MICRO and HPCA Halls of Fame, and is a recipient of multiple best paper awards. </p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/aiwxb82dtxzx5nnr/CAP_Ep_17_Vijay_Reddi-v128bhnj.mp3" length="142982791" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Vijay Janapa Reddi is an Associate Professor at Harvard University, and Vice President and Co-founder of MLCommons. He has made substantial contributions to mobile and edge computing systems, and played a key role in developing the MLPerf Benchmarks. Vijay has authored the machine learning systems book mlsysbook.ai, as part of his twin passions of education and outreach. He received the IEEE TCCA Young Computer Architect Award in 2016, has been inducted in the MICRO and HPCA Halls of Fame, and is a recipient of multiple best paper awards. ]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3574</itunes:duration>
                <itunes:episode>17</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 16: Sustainability in a Post-AI World with Dr. Carole-Jean Wu, Meta</title>
        <itunes:title>Ep 16: Sustainability in a Post-AI World with Dr. Carole-Jean Wu, Meta</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-16-sustainability-in-a-post-ai-world-with-dr-carole-jean-wu-meta/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-16-sustainability-in-a-post-ai-world-with-dr-carole-jean-wu-meta/#comments</comments>        <pubDate>Wed, 19 Jun 2024 09:18:56 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/0781fa10-c532-377f-87f9-3cf8431f7cf1</guid>
                                    <description><![CDATA[<p>Dr. Carole-Jean Wu is a Director of AI Research at Meta. She is a founding member and a Vice President of MLCommons – a non-profit organization that aims to accelerate machine learning innovations for the benefits of all. Dr. Wu also serves on the MLCommons Board as a Director, chaired the MLPerf Recommendation Benchmark Advisory Board, and co-chaired for MLPerf Inference. Prior to Meta/Facebook, Dr. Wu was a professor at ASU. She earned her M.A. and Ph.D. degrees in Electrical Engineering from Princeton University and a B.Sc. degree in Electrical and Computer Engineering from Cornell University.  Dr. Wu’s expertise sits at the intersection of computer architecture and machine learning. Her work spans across datacenter infrastructures and edge systems, such as developing energy- and memory-efficient systems and microarchitectures, optimizing systems for machine learning execution at-scale, and designing learning-based approaches for system design and optimization. She is passionate about pathfinding and tackling system challenges to enable efficient and responsible AI technologies.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Carole-Jean Wu is a Director of AI Research at Meta. She is a founding member and a Vice President of MLCommons – a non-profit organization that aims to accelerate machine learning innovations for the benefits of all. Dr. Wu also serves on the MLCommons Board as a Director, chaired the MLPerf Recommendation Benchmark Advisory Board, and co-chaired for MLPerf Inference. Prior to Meta/Facebook, Dr. Wu was a professor at ASU. She earned her M.A. and Ph.D. degrees in Electrical Engineering from Princeton University and a B.Sc. degree in Electrical and Computer Engineering from Cornell University.  Dr. Wu’s expertise sits at the intersection of computer architecture and machine learning. Her work spans across datacenter infrastructures and edge systems, such as developing energy- and memory-efficient systems and microarchitectures, optimizing systems for machine learning execution at-scale, and designing learning-based approaches for system design and optimization. She is passionate about pathfinding and tackling system challenges to enable efficient and responsible AI technologies.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/ix5hy6pv3pxaixms/CAP_Ep_16_Carole-Jean_Wu9zhvc.mp3" length="160642611" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Carole-Jean Wu is a Director of AI Research at Meta. She is a founding member and a Vice President of MLCommons – a non-profit organization that aims to accelerate machine learning innovations for the benefits of all. Dr. Wu also serves on the MLCommons Board as a Director, chaired the MLPerf Recommendation Benchmark Advisory Board, and co-chaired for MLPerf Inference. Prior to Meta/Facebook, Dr. Wu was a professor at ASU. She earned her M.A. and Ph.D. degrees in Electrical Engineering from Princeton University and a B.Sc. degree in Electrical and Computer Engineering from Cornell University.  Dr. Wu’s expertise sits at the intersection of computer architecture and machine learning. Her work spans across datacenter infrastructures and edge systems, such as developing energy- and memory-efficient systems and microarchitectures, optimizing systems for machine learning execution at-scale, and designing learning-based approaches for system design and optimization. She is passionate about pathfinding and tackling system challenges to enable efficient and responsible AI technologies.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>4016</itunes:duration>
                <itunes:episode>16</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 15: The Hardware Startup Experience from Business Case to Software with Dr. Karu Sankaralingam, University of Wisconsin-Madison/Nvidia</title>
        <itunes:title>Ep 15: The Hardware Startup Experience from Business Case to Software with Dr. Karu Sankaralingam, University of Wisconsin-Madison/Nvidia</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-15-the-hardware-startup-experience-from-business-case-to-software-with-dr-karu-sankaralingam/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-15-the-hardware-startup-experience-from-business-case-to-software-with-dr-karu-sankaralingam/#comments</comments>        <pubDate>Thu, 28 Mar 2024 06:36:52 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/2864751b-09a8-33b4-8d22-d4f73804682c</guid>
                                    <description><![CDATA[<p>Dr. Karu Sankaralingam is a Professor at the University of Wisconsin-Madison, an entrepeneur, inventor, as well as a Principal Research Scientist at NVIDIA.  His work has been featured in industry forums of Mentor and Synopsys, and has been covered by the New York Times, Wired, and IEEE Spectrum. He founded the hardware startup SimpleMachines in 2017 which developed chip designs applying dataflow computing to push the limits of AI generality in hardware and built the Mozart chip. In his career, he has led three chip projects: Mozart (16nm, HBM2 based design), MIAOW open source GPU on FPGA, and the TRIPS chip as a student during his PhD. In his research he has pioneered the principles of dataflow computing, focusing on the role of architecture, microarchitecture and the compiler. He has published over 100 research papers, has graduated 9 PhD students, is an inventor on 21 patents, and 9 award papers. He is a Fellow of IEEE.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Karu Sankaralingam is a Professor at the University of Wisconsin-Madison, an entrepeneur, inventor, as well as a Principal Research Scientist at NVIDIA.  His work has been featured in industry forums of Mentor and Synopsys, and has been covered by the New York Times, Wired, and IEEE Spectrum. He founded the hardware startup SimpleMachines in 2017 which developed chip designs applying dataflow computing to push the limits of AI generality in hardware and built the Mozart chip. In his career, he has led three chip projects: Mozart (16nm, HBM2 based design), MIAOW open source GPU on FPGA, and the TRIPS chip as a student during his PhD. In his research he has pioneered the principles of dataflow computing, focusing on the role of architecture, microarchitecture and the compiler. He has published over 100 research papers, has graduated 9 PhD students, is an inventor on 21 patents, and 9 award papers. He is a Fellow of IEEE.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/4bbu9x/CAP_Ep_15_Karu_Sankaralingam6k5e0.mp3" length="152362840" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Karu Sankaralingam is a Professor at the University of Wisconsin-Madison, an entrepeneur, inventor, as well as a Principal Research Scientist at NVIDIA.  His work has been featured in industry forums of Mentor and Synopsys, and has been covered by the New York Times, Wired, and IEEE Spectrum. He founded the hardware startup SimpleMachines in 2017 which developed chip designs applying dataflow computing to push the limits of AI generality in hardware and built the Mozart chip. In his career, he has led three chip projects: Mozart (16nm, HBM2 based design), MIAOW open source GPU on FPGA, and the TRIPS chip as a student during his PhD. In his research he has pioneered the principles of dataflow computing, focusing on the role of architecture, microarchitecture and the compiler. He has published over 100 research papers, has graduated 9 PhD students, is an inventor on 21 patents, and 9 award papers. He is a Fellow of IEEE.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3809</itunes:duration>
                <itunes:episode>15</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 14: System Design for Exascale Computing and Advanced Memory Technologies with Dr. Gabriel Loh, AMD</title>
        <itunes:title>Ep 14: System Design for Exascale Computing and Advanced Memory Technologies with Dr. Gabriel Loh, AMD</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-14-system-design-for-exascale-computing-and-advanced-memory-technologies-with-dr-gabriel-loh-amd/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-14-system-design-for-exascale-computing-and-advanced-memory-technologies-with-dr-gabriel-loh-amd/#comments</comments>        <pubDate>Wed, 06 Dec 2023 07:32:36 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/96205693-71e9-37cc-af01-0d0c3a657f16</guid>
                                    <description><![CDATA[<p>Dr. Gabriel Loh is a Senior Fellow at AMD Research and Advanced Development. Gabe is known for his contributions to 3D die-stacked architectures, memory organization and caching techniques, and chiplet multicore architectures. His ideas have influenced multiple commercial products and industry standards. He is a recipient of ACM SIGARCH's Maurice Wilkes Award, is a Hall of Fame member for MICRO, HPCA, ISCA, and a recipient of the NSF CAREER award.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Gabriel Loh is a Senior Fellow at AMD Research and Advanced Development. Gabe is known for his contributions to 3D die-stacked architectures, memory organization and caching techniques, and chiplet multicore architectures. His ideas have influenced multiple commercial products and industry standards. He is a recipient of ACM SIGARCH's Maurice Wilkes Award, is a Hall of Fame member for MICRO, HPCA, ISCA, and a recipient of the NSF CAREER award.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/57emgi/CAP_Ep_14_Gabe_Loh641aa.mp3" length="156082676" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Gabriel Loh is a Senior Fellow at AMD Research and Advanced Development. Gabe is known for his contributions to 3D die-stacked architectures, memory organization and caching techniques, and chiplet multicore architectures. His ideas have influenced multiple commercial products and industry standards. He is a recipient of ACM SIGARCH's Maurice Wilkes Award, is a Hall of Fame member for MICRO, HPCA, ISCA, and a recipient of the NSF CAREER award.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3902</itunes:duration>
                <itunes:episode>14</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 13: Energy-efficient Algorithm-hardware Co-design with Dr. Vivienne Sze, MIT</title>
        <itunes:title>Ep 13: Energy-efficient Algorithm-hardware Co-design with Dr. Vivienne Sze, MIT</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-13-energy-efficient-algorithm-hardware-co-design-with-dr-vivienne-sze-mit/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-13-energy-efficient-algorithm-hardware-co-design-with-dr-vivienne-sze-mit/#comments</comments>        <pubDate>Wed, 27 Sep 2023 12:04:45 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/9520b531-d2ee-3df6-b602-3381aea1a7c0</guid>
                                    <description><![CDATA[<p>Dr. Vivienne Sze is an associate professor in the EECS department at MIT. Vivienne is recognized for her leading work on energy-efficient computing systems spanning a wide range of domains: from video compression, to machine learning, robotics and digital health. She received the DARPA Young Faculty Award, Edgerton Faculty Award, faculty grants from Google, Facebook and Qualcomm, and a Primetime Engineering Emmy as a member of the team that developed the High-Efficiency Video Coding standard.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Vivienne Sze is an associate professor in the EECS department at MIT. Vivienne is recognized for her leading work on energy-efficient computing systems spanning a wide range of domains: from video compression, to machine learning, robotics and digital health. She received the DARPA Young Faculty Award, Edgerton Faculty Award, faculty grants from Google, Facebook and Qualcomm, and a Primetime Engineering Emmy as a member of the team that developed the High-Efficiency Video Coding standard.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/ym3axw/Ep_12_Vivienne_Sze_v206i6e1.mp3" length="139402970" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Vivienne Sze is an associate professor in the EECS department at MIT. Vivienne is recognized for her leading work on energy-efficient computing systems spanning a wide range of domains: from video compression, to machine learning, robotics and digital health. She received the DARPA Young Faculty Award, Edgerton Faculty Award, faculty grants from Google, Facebook and Qualcomm, and a Primetime Engineering Emmy as a member of the team that developed the High-Efficiency Video Coding standard.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3485</itunes:duration>
                <itunes:episode>13</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 12: 50th Anniversary of SIGARCH Special Episode with Dr. David Patterson, Dr. Norm Jouppi and Dr. Natalie Enright-Jerger</title>
        <itunes:title>Ep 12: 50th Anniversary of SIGARCH Special Episode with Dr. David Patterson, Dr. Norm Jouppi and Dr. Natalie Enright-Jerger</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-12-50th-anniversary-of-isca-special-episode-with-dr-david-patterson-dr-norm-jouppi-and-dr-natalie-enright-jerger/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-12-50th-anniversary-of-isca-special-episode-with-dr-david-patterson-dr-norm-jouppi-and-dr-natalie-enright-jerger/#comments</comments>        <pubDate>Sat, 10 Jun 2023 14:17:52 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/37d397db-ad8f-30db-9615-a036a9df6f5d</guid>
                                    <description><![CDATA[<p>This is a special episode to commemorate the 50th anniversary of SIGARCH. We have three leaders from our community who have served as SIGARCH chairs -- Dr. David Patterson, Dr. Norm Jouppi and Dr. Natalie Entright-Jerger -- reflect on the evolution of the computer architecture field as well as our community over half a century, and share their perspectives on opportunities and exciting times ahead. </p>
<p>David Patterson is a professor emeritus at ​​UC Berkeley, a distinguished engineer at Google, and recipient of the Turing Award. Norm Jouppi, a VP and Engineering Fellow at Google, where he is the chief architect for Google's Tensor Processing Units (TPUs), and a recipient of the Eckert-Mauchly award. Natalie Enright-Jerger is a professor at the University of Toronto, where she is the Canada Research Chair in Computer Architecture, and is a recipient of the Alfred P. Sloan Research Fellowship, and distinguished member of ACM and IEEE.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>This is a special episode to commemorate the 50th anniversary of SIGARCH. We have three leaders from our community who have served as SIGARCH chairs -- Dr. David Patterson, Dr. Norm Jouppi and Dr. Natalie Entright-Jerger -- reflect on the evolution of the computer architecture field as well as our community over half a century, and share their perspectives on opportunities and exciting times ahead. </p>
<p>David Patterson is a professor emeritus at ​​UC Berkeley, a distinguished engineer at Google, and recipient of the Turing Award. Norm Jouppi, a VP and Engineering Fellow at Google, where he is the chief architect for Google's Tensor Processing Units (TPUs), and a recipient of the Eckert-Mauchly award. Natalie Enright-Jerger is a professor at the University of Toronto, where she is the Canada Research Chair in Computer Architecture, and is a recipient of the Alfred P. Sloan Research Fellowship, and distinguished member of ACM and IEEE.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/x428qc/Ep_13_ISCA_50_vfinal77crb.mp3" length="150662791" type="audio/mpeg"/>
        <itunes:summary><![CDATA[This is a special episode to commemorate the 50th anniversary of SIGARCH. We have three leaders from our community who have served as SIGARCH chairs -- Dr. David Patterson, Dr. Norm Jouppi and Dr. Natalie Entright-Jerger -- reflect on the evolution of the computer architecture field as well as our community over half a century, and share their perspectives on opportunities and exciting times ahead. 
David Patterson is a professor emeritus at ​​UC Berkeley, a distinguished engineer at Google, and recipient of the Turing Award. Norm Jouppi, a VP and Engineering Fellow at Google, where he is the chief architect for Google's Tensor Processing Units (TPUs), and a recipient of the Eckert-Mauchly award. Natalie Enright-Jerger is a professor at the University of Toronto, where she is the Canada Research Chair in Computer Architecture, and is a recipient of the Alfred P. Sloan Research Fellowship, and distinguished member of ACM and IEEE.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3766</itunes:duration>
                <itunes:episode>12</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 11: Future of AI Computing and How to Build &amp; Nurture Hardware Teams with Jim Keller, Tenstorrent</title>
        <itunes:title>Ep 11: Future of AI Computing and How to Build &amp; Nurture Hardware Teams with Jim Keller, Tenstorrent</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/episode-11-future-of-ai-computing-and-how-to-build-nurture-hardware-teams%c2%a0with-jim-keller-tenstorrent/</link>
                    <comments>https://comparchpodcast.podbean.com/e/episode-11-future-of-ai-computing-and-how-to-build-nurture-hardware-teams%c2%a0with-jim-keller-tenstorrent/#comments</comments>        <pubDate>Mon, 13 Feb 2023 22:41:01 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/f26e752f-a6a5-3c58-8972-c97d2be5319d</guid>
                                    <description><![CDATA[<p>Jim Keller is the CTO of Tenstorrent, and a veteran computer architect. Prior to Tenstorrent, he has held roles of Senior Vice President at Intel, Vice President of Autopilot at Tesla, Vice President and Chief Architect at AMD, and at PA Semi which was acquired by Apple. Jim has led multiple successful silicon designs over the decades, from the DEC Alpha processors, to AMD K7/K8/K12, HyperTransport and the AMD Zen family, the Apple A4/A5 processors, and Telsa's self-driving car chip.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Jim Keller is the CTO of Tenstorrent, and a veteran computer architect. Prior to Tenstorrent, he has held roles of Senior Vice President at Intel, Vice President of Autopilot at Tesla, Vice President and Chief Architect at AMD, and at PA Semi which was acquired by Apple. Jim has led multiple successful silicon designs over the decades, from the DEC Alpha processors, to AMD K7/K8/K12, HyperTransport and the AMD Zen family, the Apple A4/A5 processors, and Telsa's self-driving car chip.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/j2anpp/Ep_11_Jim_Keller_v10a1xn2.mp3" length="197662301" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Jim Keller is the CTO of Tenstorrent, and a veteran computer architect. Prior to Tenstorrent, he has held roles of Senior Vice President at Intel, Vice President of Autopilot at Tesla, Vice President and Chief Architect at AMD, and at PA Semi which was acquired by Apple. Jim has led multiple successful silicon designs over the decades, from the DEC Alpha processors, to AMD K7/K8/K12, HyperTransport and the AMD Zen family, the Apple A4/A5 processors, and Telsa's self-driving car chip.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>4941</itunes:duration>
                <itunes:episode>11</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 10: Physically-constrained Computing Systems with Dr. Brandon Lucia, Carnegie Mellon University</title>
        <itunes:title>Ep 10: Physically-constrained Computing Systems with Dr. Brandon Lucia, Carnegie Mellon University</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-10-physically-constrained-computing-systems-with-dr-brandon-lucia-carnegie-mellon-university/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-10-physically-constrained-computing-systems-with-dr-brandon-lucia-carnegie-mellon-university/#comments</comments>        <pubDate>Fri, 18 Nov 2022 19:04:30 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/a65904b9-0ea2-3286-8775-b9e7f330157d</guid>
                                    <description><![CDATA[<p>Dr. Brandon Lucia is a professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University. Prof. Lucia has made significant contributions to enabling capable and reliable intermittent computing systems, developing techniques that span the hardware-software stack from novel microarchitectures, to programming models and tools. He is a recipient of the IEEE TCCA Young Computer Architect Award, the Sloan Research Fellowship, and several best paper awards.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Brandon Lucia is a professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University. Prof. Lucia has made significant contributions to enabling capable and reliable intermittent computing systems, developing techniques that span the hardware-software stack from novel microarchitectures, to programming models and tools. He is a recipient of the IEEE TCCA Young Computer Architect Award, the Sloan Research Fellowship, and several best paper awards.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/7k3y3e/CAP_Ep_10_Brandon_Lucia_v11-001abwmx.mp3" length="159023019" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Brandon Lucia is a professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University. Prof. Lucia has made significant contributions to enabling capable and reliable intermittent computing systems, developing techniques that span the hardware-software stack from novel microarchitectures, to programming models and tools. He is a recipient of the IEEE TCCA Young Computer Architect Award, the Sloan Research Fellowship, and several best paper awards.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3975</itunes:duration>
                <itunes:episode>10</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 9: Hyperscale Cloud and Agile Hardware Design in China with Dr. Yungang Bao, Institute of Computing Technology</title>
        <itunes:title>Ep 9: Hyperscale Cloud and Agile Hardware Design in China with Dr. Yungang Bao, Institute of Computing Technology</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-9-hyperscale-cloud-and-agile-hardware-design-in-china/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-9-hyperscale-cloud-and-agile-hardware-design-in-china/#comments</comments>        <pubDate>Sat, 06 Aug 2022 17:21:46 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/fcc4ee01-ce67-3093-a0c4-84889836fb25</guid>
                                    <description><![CDATA[<p>Dr. Yungang Bao is a professor at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) and the deputy director of ICT-CAS. Prof. Bao founded the China RISC-V Alliance (CRVA) and serves as the secretary-general of CRVA. His research interests include open-source hardware and agile chip design, datacenter architecture and memory systems. Prof. Bao’s contributions include developing the PARSEC 3.0 benchmark suite which has been adopted by leading industry players in China (like Alibaba and Huawei), the labeled von Neumann paradigm to enable a software-defined cloud, Hybrid Memory Trace Tool (HMTT), and Partition-Based DMA Cache. He was awarded the CCF-Intel Young Faculty Award, was the winner of CCF-IEEE CS Young Computer Scientist Award, and received China’s National Honor for Youth under 40.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Yungang Bao is a professor at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) and the deputy director of ICT-CAS. Prof. Bao founded the China RISC-V Alliance (CRVA) and serves as the secretary-general of CRVA. His research interests include open-source hardware and agile chip design, datacenter architecture and memory systems. Prof. Bao’s contributions include developing the PARSEC 3.0 benchmark suite which has been adopted by leading industry players in China (like Alibaba and Huawei), the labeled von Neumann paradigm to enable a software-defined cloud, Hybrid Memory Trace Tool (HMTT), and Partition-Based DMA Cache. He was awarded the CCF-Intel Young Faculty Award, was the winner of CCF-IEEE CS Young Computer Scientist Award, and received China’s National Honor for Youth under 40.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/a9wn9c/2022-04-23_CAP_Ep_9_Yungang_Bao_v1062x3e.mp3" length="126722088" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Yungang Bao is a professor at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) and the deputy director of ICT-CAS. Prof. Bao founded the China RISC-V Alliance (CRVA) and serves as the secretary-general of CRVA. His research interests include open-source hardware and agile chip design, datacenter architecture and memory systems. Prof. Bao’s contributions include developing the PARSEC 3.0 benchmark suite which has been adopted by leading industry players in China (like Alibaba and Huawei), the labeled von Neumann paradigm to enable a software-defined cloud, Hybrid Memory Trace Tool (HMTT), and Partition-Based DMA Cache. He was awarded the CCF-Intel Young Faculty Award, was the winner of CCF-IEEE CS Young Computer Scientist Award, and received China’s National Honor for Youth under 40.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3168</itunes:duration>
                <itunes:episode>9</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 8: Durable Security and Privacy-enhanced Computing with Dr. Todd Austin, University of Michigan</title>
        <itunes:title>Ep 8: Durable Security and Privacy-enhanced Computing with Dr. Todd Austin, University of Michigan</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-8-durable-security-and-privacy-enhanced-computing-with-dr-todd-austin-university-of-michigan/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-8-durable-security-and-privacy-enhanced-computing-with-dr-todd-austin-university-of-michigan/#comments</comments>        <pubDate>Sat, 07 May 2022 19:10:34 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/29e535b0-0d91-345b-baf5-97b92d07ac4a</guid>
                                    <description><![CDATA[<p>Dr. Todd Austin is a Professor of Electrical Engineering and Computer Science at the University of Michigan in Ann Arbor. His research interests include robust and secure system design, hardware and software verification, and performance analysis tools and techniques. Todd has donned multiple hats, being a senior processor architect at Intel’s Microprocessor Research Labs, a professor at the University of Michigan, serving as the director of research centers like C-FAR, and more recently serving as the CEO and co-founder of the startup Agita Labs. He is also an IEEE Fellow and received the ACM Maurice Wilkes Award for his work on SimpleScalar, and the DIVA and Razor architectures.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Todd Austin is a Professor of Electrical Engineering and Computer Science at the University of Michigan in Ann Arbor. His research interests include robust and secure system design, hardware and software verification, and performance analysis tools and techniques. Todd has donned multiple hats, being a senior processor architect at Intel’s Microprocessor Research Labs, a professor at the University of Michigan, serving as the director of research centers like C-FAR, and more recently serving as the CEO and co-founder of the startup Agita Labs. He is also an IEEE Fellow and received the ACM Maurice Wilkes Award for his work on SimpleScalar, and the DIVA and Razor architectures.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/kcwp5n/2022-02-25_CAP_Ep_8_Todd_Austin_v208m6op.mp3" length="145882382" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Todd Austin is a Professor of Electrical Engineering and Computer Science at the University of Michigan in Ann Arbor. His research interests include robust and secure system design, hardware and software verification, and performance analysis tools and techniques. Todd has donned multiple hats, being a senior processor architect at Intel’s Microprocessor Research Labs, a professor at the University of Michigan, serving as the director of research centers like C-FAR, and more recently serving as the CEO and co-founder of the startup Agita Labs. He is also an IEEE Fellow and received the ACM Maurice Wilkes Award for his work on SimpleScalar, and the DIVA and Razor architectures.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3647</itunes:duration>
                <itunes:episode>8</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 7: Domain-specific Systems for AR/VR and Extended Reality with Dr. Sarita Adve, University of Illinois at Urbana-Champaign</title>
        <itunes:title>Ep 7: Domain-specific Systems for AR/VR and Extended Reality with Dr. Sarita Adve, University of Illinois at Urbana-Champaign</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-7-domain-specific-systems-for-arvr-and-extended-reality-with-dr-sarita-adve/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-7-domain-specific-systems-for-arvr-and-extended-reality-with-dr-sarita-adve/#comments</comments>        <pubDate>Tue, 08 Feb 2022 18:46:56 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/10900b25-cf52-3b1e-a1d5-633512dbfc86</guid>
                                    <description><![CDATA[<p>Dr. Sarita Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests span the system stack, including hardware, programming languages, operating systems, and applications. She co-developed the memory consistency models for the C++ and Java programming languages, based on her early work on data-race-free (DRF) models, and has made innovative contributions to heterogenous computing and software-driven approaches to resiliency. Her group recently released the Illinois Extended Reality testbed (ILLIXR), the first fully open source extended reality system to democratize XR systems research and development. She is a fellow of the American Academy of Arts and Science, IEEE, ACM and a recipient of the ACM SIGARCH Maurice Wilkes award. As ACM SIGARCH chair, she co-founded the CARES movement, and is a winner of the CRA distinguished service award.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Sarita Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests span the system stack, including hardware, programming languages, operating systems, and applications. She co-developed the memory consistency models for the C++ and Java programming languages, based on her early work on data-race-free (DRF) models, and has made innovative contributions to heterogenous computing and software-driven approaches to resiliency. Her group recently released the Illinois Extended Reality testbed (ILLIXR), the first fully open source extended reality system to democratize XR systems research and development. She is a fellow of the American Academy of Arts and Science, IEEE, ACM and a recipient of the ACM SIGARCH Maurice Wilkes award. As ACM SIGARCH chair, she co-founded the CARES movement, and is a winner of the CRA distinguished service award.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/9i26bs/2021-10-21_CAP_Ep_7_Sarita_Adve_v12883ow.mp3" length="144142627" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Sarita Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests span the system stack, including hardware, programming languages, operating systems, and applications. She co-developed the memory consistency models for the C++ and Java programming languages, based on her early work on data-race-free (DRF) models, and has made innovative contributions to heterogenous computing and software-driven approaches to resiliency. Her group recently released the Illinois Extended Reality testbed (ILLIXR), the first fully open source extended reality system to democratize XR systems research and development. She is a fellow of the American Academy of Arts and Science, IEEE, ACM and a recipient of the ACM SIGARCH Maurice Wilkes award. As ACM SIGARCH chair, she co-founded the CARES movement, and is a winner of the CRA distinguished service award.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3603</itunes:duration>
                <itunes:episode>7</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 6: Quantum Computing Architectures with Dr. Fred Chong, University of Chicago</title>
        <itunes:title>Ep 6: Quantum Computing Architectures with Dr. Fred Chong, University of Chicago</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-6-quantum-computing-architectures-with-dr-fred-chong-university-of-chicago/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-6-quantum-computing-architectures-with-dr-fred-chong-university-of-chicago/#comments</comments>        <pubDate>Mon, 30 Aug 2021 08:18:28 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/17979deb-4350-32bf-aad9-bc9c635d0be4</guid>
                                    <description><![CDATA[<p>Dr. Fred Chong is the Seymour Goodman Professor in the Department of Computer Science at the University of Chicago, and the chief scientist of SuperTech, a quantum software startup. He is also Lead Principal Investigator for the EPiQC Project, an NSF Expedition in Computing. Previously, Fred received his Ph.D. from MIT in 1996 and was a faculty member at UC Davis and UC Santa Barbara. Fred has made significant contributions to architecture and system stack for quantum computing, and his other research interests include emerging technologies for computing, multicore and embedded architectures, computer security, and sustainable computing.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Fred Chong is the Seymour Goodman Professor in the Department of Computer Science at the University of Chicago, and the chief scientist of SuperTech, a quantum software startup. He is also Lead Principal Investigator for the EPiQC Project, an NSF Expedition in Computing. Previously, Fred received his Ph.D. from MIT in 1996 and was a faculty member at UC Davis and UC Santa Barbara. Fred has made significant contributions to architecture and system stack for quantum computing, and his other research interests include emerging technologies for computing, multicore and embedded architectures, computer security, and sustainable computing.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/ft795s/2021-05-06_CAP_Ep_6_Fred_Chong-002bb3hm.mp3" length="141523068" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Fred Chong is the Seymour Goodman Professor in the Department of Computer Science at the University of Chicago, and the chief scientist of SuperTech, a quantum software startup. He is also Lead Principal Investigator for the EPiQC Project, an NSF Expedition in Computing. Previously, Fred received his Ph.D. from MIT in 1996 and was a faculty member at UC Davis and UC Santa Barbara. Fred has made significant contributions to architecture and system stack for quantum computing, and his other research interests include emerging technologies for computing, multicore and embedded architectures, computer security, and sustainable computing.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3538</itunes:duration>
                <itunes:episode>6</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 5: Datacenter Architectures and Cloud Microservices with Dr. Christina Delimitrou, Cornell University</title>
        <itunes:title>Ep 5: Datacenter Architectures and Cloud Microservices with Dr. Christina Delimitrou, Cornell University</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-5-datacenter-architectures-and-cloud-microservices-with-dr-christina-delimitrou-cornell-university/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-5-datacenter-architectures-and-cloud-microservices-with-dr-christina-delimitrou-cornell-university/#comments</comments>        <pubDate>Sat, 05 Jun 2021 08:35:23 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/182be43f-837e-3f13-8803-509de01757e7</guid>
                                    <description><![CDATA[<p>Dr. Christina Delimitrou is an assistant professor in the Electrical and Computer Engineering Department at Cornell University. Prof. Delimitrou has made significant contributions to improving resource efficiency of large-scale datacenters, QoS-aware scheduling and resource management techniques, performance debugging, and cloud security. She received the 2020 IEEE TCCA Young Architect Award for leading research in ML-driven management and design of cloud systems. She talks to us about datacenter architectures, cloud microservices, and applying machine learning techniques to optimizing and managing these systems.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Christina Delimitrou is an assistant professor in the Electrical and Computer Engineering Department at Cornell University. Prof. Delimitrou has made significant contributions to improving resource efficiency of large-scale datacenters, QoS-aware scheduling and resource management techniques, performance debugging, and cloud security. She received the 2020 IEEE TCCA Young Architect Award for leading research in ML-driven management and design of cloud systems. She talks to us about datacenter architectures, cloud microservices, and applying machine learning techniques to optimizing and managing these systems.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/22uct6/2021-03-11_CAP_Ep_5_Christina_Delimitrou-0027ygt2.mp3" length="117002448" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Christina Delimitrou is an assistant professor in the Electrical and Computer Engineering Department at Cornell University. Prof. Delimitrou has made significant contributions to improving resource efficiency of large-scale datacenters, QoS-aware scheduling and resource management techniques, performance debugging, and cloud security. She received the 2020 IEEE TCCA Young Architect Award for leading research in ML-driven management and design of cloud systems. She talks to us about datacenter architectures, cloud microservices, and applying machine learning techniques to optimizing and managing these systems.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>2925</itunes:duration>
                <itunes:episode>5</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 4: Cross-layer Optimizations and Impactful Collaborations with Dr. Mark D. Hill, University of Wisconsin-Madison / Microsoft</title>
        <itunes:title>Ep 4: Cross-layer Optimizations and Impactful Collaborations with Dr. Mark D. Hill, University of Wisconsin-Madison / Microsoft</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-4-cross-layer-optimizations-and-impactful-collaborations-with-dr-mark-d-hill-university-of-wisconsin-madison-microsoft/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-4-cross-layer-optimizations-and-impactful-collaborations-with-dr-mark-d-hill-university-of-wisconsin-madison-microsoft/#comments</comments>        <pubDate>Thu, 11 Mar 2021 06:33:44 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/fce87c42-b59f-32fb-b0ca-26715e882b51</guid>
                                    <description><![CDATA[<p>Dr. Mark D. Hill is a professor emeritus of computer sciences at the University of Wisconsin Madison, and currently a Partner Hardware Architect with Microsoft Azure. He has made numerous contributions to parallel computer system design, memory system design, computer simulation, and more.  He is well known for his advice and collaborative work style, having published papers with 160 different co-authors. He talks to us about cross-layer optimizations, impactful collaborations, and visioning for computer architecture research. </p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Mark D. Hill is a professor emeritus of computer sciences at the University of Wisconsin Madison, and currently a Partner Hardware Architect with Microsoft Azure. He has made numerous contributions to parallel computer system design, memory system design, computer simulation, and more.  He is well known for his advice and collaborative work style, having published papers with 160 different co-authors. He talks to us about cross-layer optimizations, impactful collaborations, and visioning for computer architecture research. </p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/hdy8aw/2020-11-10_CAP_Ep_4_Mark_Hill-0029ywqk.mp3" length="121122480" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Mark D. Hill is a professor emeritus of computer sciences at the University of Wisconsin Madison, and currently a Partner Hardware Architect with Microsoft Azure. He has made numerous contributions to parallel computer system design, memory system design, computer simulation, and more.  He is well known for his advice and collaborative work style, having published papers with 160 different co-authors. He talks to us about cross-layer optimizations, impactful collaborations, and visioning for computer architecture research. ]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3028</itunes:duration>
                <itunes:episode>4</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 3: Privacy-preserving Covid Tracing and the Hardware-Software Stack with Dr. James Larus, EPFL</title>
        <itunes:title>Ep 3: Privacy-preserving Covid Tracing and the Hardware-Software Stack with Dr. James Larus, EPFL</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-3-privacy-preserving-covid-tracing-and-the-hardware-software-stack-with-dr-james-larus-epfl/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-3-privacy-preserving-covid-tracing-and-the-hardware-software-stack-with-dr-james-larus-epfl/#comments</comments>        <pubDate>Wed, 23 Dec 2020 22:17:31 -0800</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/ac4442f1-3eed-3c78-80fd-57a9de3451b1</guid>
                                    <description><![CDATA[<p>Dr. James Larus is Professor and Dean of the School of Computer and Communication Sciences at EPFL. Prof. Larus has made contributions to several fields spanning programming languages, compilers, computer architecture, and computer systems. He co-led the Wisconsin Wind Tunnel project, started the Singularity project at Microsoft Research (MSR), created Orleans framework for cloud programming as director of the Extreme Computing Group at MSR. He talks to us about privacy-by-design, the associated challenges across the hardware-software stack, and the implications on the design of digital contact-tracing protocols (DP-3T) during the Covid-19 pandemic.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. James Larus is Professor and Dean of the School of Computer and Communication Sciences at EPFL. Prof. Larus has made contributions to several fields spanning programming languages, compilers, computer architecture, and computer systems. He co-led the Wisconsin Wind Tunnel project, started the Singularity project at Microsoft Research (MSR), created Orleans framework for cloud programming as director of the Extreme Computing Group at MSR. He talks to us about privacy-by-design, the associated challenges across the hardware-software stack, and the implications on the design of digital contact-tracing protocols (DP-3T) during the Covid-19 pandemic.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/3b9hpm/2020-10-16_CAP_Ep_3_Jim_Larus_v209om85.mp3" length="130961240" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. James Larus is Professor and Dean of the School of Computer and Communication Sciences at EPFL. Prof. Larus has made contributions to several fields spanning programming languages, compilers, computer architecture, and computer systems. He co-led the Wisconsin Wind Tunnel project, started the Singularity project at Microsoft Research (MSR), created Orleans framework for cloud programming as director of the Extreme Computing Group at MSR. He talks to us about privacy-by-design, the associated challenges across the hardware-software stack, and the implications on the design of digital contact-tracing protocols (DP-3T) during the Covid-19 pandemic.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3274</itunes:duration>
                <itunes:episode>3</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 2: Domain-specific Accelerators with Dr. Bill Dally, Nvidia</title>
        <itunes:title>Ep 2: Domain-specific Accelerators with Dr. Bill Dally, Nvidia</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-2-domain-specific-accelerators-with-dr-bill-dally-nvidia/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-2-domain-specific-accelerators-with-dr-bill-dally-nvidia/#comments</comments>        <pubDate>Tue, 20 Oct 2020 22:38:44 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/e12c48cc-a4fb-3826-961f-811d6d295824</guid>
                                    <description><![CDATA[<p>Dr. Bill Dally is the Chief Scientist and Senior Vice President of Research at Nvidia, and a Professor of Computer Science at Stanford University. Dr. Dally has had a storied career with contributions to parallel computer architectures, interconnection networks, GPUs, accelerators and more. He has a history of designing innovative and experimental computing systems such as the MARS accelerator, the MOSSIM simulation engine, the J-Machine and M-machine, to name a few. He talks to us about computing innovation in the post-Moore era, domain-specific accelerators, and technology transfer in computing.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Bill Dally is the Chief Scientist and Senior Vice President of Research at Nvidia, and a Professor of Computer Science at Stanford University. Dr. Dally has had a storied career with contributions to parallel computer architectures, interconnection networks, GPUs, accelerators and more. He has a history of designing innovative and experimental computing systems such as the MARS accelerator, the MOSSIM simulation engine, the J-Machine and M-machine, to name a few. He talks to us about computing innovation in the post-Moore era, domain-specific accelerators, and technology transfer in computing.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/7fxwqp/2020-07-23_CAP_Ep_2_Bill_Dally-00468qvc.mp3" length="130402219" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Bill Dally is the Chief Scientist and Senior Vice President of Research at Nvidia, and a Professor of Computer Science at Stanford University. Dr. Dally has had a storied career with contributions to parallel computer architectures, interconnection networks, GPUs, accelerators and more. He has a history of designing innovative and experimental computing systems such as the MARS accelerator, the MOSSIM simulation engine, the J-Machine and M-machine, to name a few. He talks to us about computing innovation in the post-Moore era, domain-specific accelerators, and technology transfer in computing.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3260</itunes:duration>
                <itunes:episode>2</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
            </item>
    <item>
        <title>Ep 1: Systems for ML with Dr. Kim Hazelwood, Facebook</title>
        <itunes:title>Ep 1: Systems for ML with Dr. Kim Hazelwood, Facebook</itunes:title>
        <link>https://comparchpodcast.podbean.com/e/ep-1-systems-for-ml-with-dr-kim-hazelwood-facebook/</link>
                    <comments>https://comparchpodcast.podbean.com/e/ep-1-systems-for-ml-with-dr-kim-hazelwood-facebook/#comments</comments>        <pubDate>Thu, 28 May 2020 05:28:28 -0700</pubDate>
        <guid isPermaLink="false">comparchpodcast.podbean.com/b8d557d0-df57-5bf6-8b09-1fdf8658b10f</guid>
                                    <description><![CDATA[<p>Dr. Kim Hazelwood is the west coast head of engineering at Facebook AI Research (FAIR). Prior to Facebook, Kim has donned several hats from being a tenured professor at the University of Virginia, directory of systems research at Yahoo Labs, and a software engineer at Google. Today, she joins us to discuss systems for Machine Learning (ML), and share her insights on having an agile career.</p>
]]></description>
                                                            <content:encoded><![CDATA[<p>Dr. Kim Hazelwood is the west coast head of engineering at Facebook AI Research (FAIR). Prior to Facebook, Kim has donned several hats from being a tenured professor at the University of Virginia, directory of systems research at Yahoo Labs, and a software engineer at Google. Today, she joins us to discuss systems for Machine Learning (ML), and share her insights on having an agile career.</p>
]]></content:encoded>
                                    
        <enclosure url="https://mcdn.podbean.com/mf/web/1mti1z/09_2020-02-25_CAP_Ep_1_Kim_Hazelwood_publish_v1_9zals.mp3" length="59784880" type="audio/mpeg"/>
        <itunes:summary><![CDATA[Dr. Kim Hazelwood is the west coast head of engineering at Facebook AI Research (FAIR). Prior to Facebook, Kim has donned several hats from being a tenured professor at the University of Virginia, directory of systems research at Yahoo Labs, and a software engineer at Google. Today, she joins us to discuss systems for Machine Learning (ML), and share her insights on having an agile career.]]></itunes:summary>
        <itunes:author>comparchpodcast</itunes:author>
        <itunes:explicit>false</itunes:explicit>
        <itunes:block>No</itunes:block>
        <itunes:duration>3736</itunes:duration>
                <itunes:episode>1</itunes:episode>
        <itunes:episodeType>full</itunes:episodeType>
        <itunes:image href="https://pbcdn1.podbean.com/imglogo/ep-logo/pbblog8578213/sigarch-comparch-today.jpg" />    </item>
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